Digital ICs require decoupling capacitors, to absorb the small current spikes from the switching behavior of the IC. Most of what we know about decoupling capacitor layout is "conventional wisdom", such as:
1. Need a variety of capacitance values to decouple a wide frequency range
2. Many capacitors of one value is better than many values
3. Place caps close to ICs
4. Location doesn't matter
5. Spread caps across the entire board
Most of our conventional wisdom is based on guidelines instead of empirical data.
I found an excellent presentation which explains proper decoupling capacitor placement: